Implementation of a High-Speed and High-Throughput Advanced Encryption Standard

Data security is an essential aspect of data communication and storage. To provide high-level against all kinds unauthorized accesses, cryptographic algorithms have been applied to various fields such as medical military applications. Advanced Encryption Standard (AES), a symmetric algorithm, acknowledged the most secure algorithm for process globally. Several modifications made original architecture after it was proposed by two Belgian researchers, Joan Daemen Vincent Rijment, at third AES candidate Conference in 2000. The existing aim increase speed. This paper proposes efficient pipelined key expansion process, effectively reducing propagation delay generate required subkeys. Along with pipeline structure, fork join also used part architecture, significantly reduces time taken simulated implemented on Xilinx Virtex4 XC4VLX200 FPGA. result indicates that achieves improvement about 37% throughput compared architecture. Also, can convert given plain text cipher minimal delay.